Host systems often communicate with peripheral devices (e.g., a target device) via an interface such as the Peripheral Component Interconnect Express (PCIe) interface. A common (e.g., synchronized) reference clock may be used by host and target devices that are in communication via a communication interface such as PCIe. While separate clock architecture (e.g., an unsynchronized clocking scheme) may be used, separate clock architecture may not be supported by some systems.